Why do we use CMOS?
The logic functions implemented in CMOS circuits could be designed with just one half of the circuit. Look at the CMOS circuits in the writeups above: the logical gates that are represented could very easily be achieved by using the bottom half of the circuit only. The pull-up part of a CMOS circuit (the part on top, above the "out" gate) is the inverse of the pull-down part. The reason CMOS is used is because the power dissipated by the circuit, and thus the heat generated by it, is greatly reduced. It may not be readily apparent why this is the case. Adding more transistors would, at first glance, seem to increase the power dissipated.
However, consider the fact that the pull-up and pull-down portions of the circuit are inverse functions. If the pull-up is a NAND, then the pull-down is an OR. If you feed the same inputs to both parts, invariably one will be low (outputting a 0) and one will be high (outputting a 1). As a result, at least one portion of the circuit will be acting as an open circuit. The voltage present at the drain will have no path to ground, so only a negligible amount of current will ever be present in the entire circuit.
One way to model MOSFETs as linear elements is to look at them as if they were resistors when they are on, and as open switches when they are off. If the circuit were just composed of the pull-down portion, a ton of current would flow through that resistor whenever the MOSFET was fed a high voltage (logical 1). Looking at the FET as a resistor with one side attached to ground and one side attached to the drain voltage, Ohm's Law tells us that current with magnitude = (drain voltage) / ((ON resistance of MOSFET) + (Load resistance)) will flow through. Power is equal to current times voltage, so you will get a significant power here, which is known as static power.
If we've come up with an ingenious method of eliminating this static power, why do circuits like microprocessors produce heat at all? In addition to static power, there is dynamic power. Every MOSFET has a small parasitic capacitance at its drain. This is simply a result of its imperfection in production. When MOSFETs switch from on to off and back again, charge builds up on that imaginary capacitor. When the capacitor discharges, some power is dissipated over the present resistors, thus producing dynamic power.