On the Motorola 68HC11 Microcontroller
, the Condition Code Register
CCR, "C" Register) stores information about the status of the last instruction
that was executed. The CCR has 8 bits
, each is set
, or left alone depending on the last instruction
, and its operands
and results. The bits are:
bit 0: Carry Bit - Set when an addition produces a carry, a subtraction produces a borrow, or a shift or rotate instruction shifts out a 1. The converse will clear the carry bit (i.e. an addition that doesn't produce a carry will clear the flag).
bit 1: oVerflow Bit - Set when there's an error in a mathematical operation (i.e. when two positive numbers add together and are too large for the register, or when a multiplication produces a number that's too large).
bit 2: Zero Bit - Set when the result of the last operation is exactly zero, will be cleared when an operation produces a non-zero result. Z and N cannot be set at the same time, as zero is a positive number.
bit 3: Negative Bit - Set when the result of the last operation is negative, and is cleared when an operation produces a positive result.
bit 4: I Interrupt Mask - When set, the IRQ interrupt and all interrupts above IRQ are disabled or ignored.
bit 5: Half-Carry Bit - Set when a there is a carry out of bit 3 and bit 4 on either 8-bit register (A or B), a carry from the lower nibble to the upper nibble.
bit 6: X Interrupt Mask - When set, disables all XIRQ interrupts.
bit 7: Stop Disable - When set, disables use of the STOP instruction, to prevent inadvertent use.