A chip multiprocessor. CMPs place several processors on one die and can be potentially faster than other SMP techniques because the processors sit on a fast internal bus and share L2 cache. IBM's Power4 processor is a CMP.
CMP is also a 6502 instruction that does a subtraction A - N, throwing away the result but updating the flags as if the instruction were SBC. Often used for comparisons.
- Function: A - N => bit bucket
- Updates flags: S . . . . . Z C
- Opcode numbers:
(d,x) $C1
dp $C5
imm $C9
abs $CD
(d),y $D1
d,x $D5
a,y $D9
a,x $DD
Similar: CPX | CPY | SBC
See also: 6502 instructions | 6502 addressing modes