The D Flip-Flop is a very common sort of flip-flop
(FF) that has only one input
It is constructed easily from the SR flip-flop
D--+--|S Y|---Q clk D | Q
_|_ | | _ --+--
\_/ | SR | _/_ 0 | 0
o | FF | _/ 1 | 1
| | |
The D, like other sorts of FF's responds only on the active edge of the clock signal. See SR Flip-Flop. Unlike other sorts, however, the D has no rest state. On every clock cycle the FF must be either set or reset. This makes it ideal for storing the state of a state machine (since it changes on every clock pulse).
Multiple D FF's can be arranged in a bank to form a register, and thus are an important building block in many other components.
See also bistable multivibrator, SR Latch, SR Flip-Flop, JK Flip Flop, synchronous sequential network.