A
C-like
HDL (
hardware description language) used by
ASIC (and other chip) designers to model/simulate the logic required to make the chip function. If you think in terms of serial-threaded
software, the first time you sit down to look at
Verilog your head will hurt because most every statement runs in
parallel -- the way most
hardware works anyway.
"
If it weren't hard, they wouldn't call it hardware"