A digital system architecture
, where there are two memory bus
es: one for devices
attached to the system
like hard disk controllers
and serial UART
handlers and graphics chips
, and another separate bus for RAM
. This is convenient in some ways, since devices tend to be slower than RAM
and hence you can actually access both simultaneously without too much loss of performance. This also means you have separate load and store instructions for I/O devices other than RAM.
The name comes from the fact that I/O devices are "mapped" (in other words, where they live, or their address is marked as being somewhere in) to the I/O memory space, rather than the "real" memory space.