Every
instruction set to be
executed must be copied from the memory into the
control unit before its requested function can be performed. Once in the
control unit, it is decoded and executed and since the instructions are naturally in
binary, individual
bits and
groups of bits can easily be directed through
gates that will ultimately cause the
instruction to be executed. The steps required to get the
instruction are called the
fetch cycle.
The
address of the next
instruction to be executed is stored in a specific
control unit register called the
program counter. The fetch process begins by copying the contents of the
program counter into the
memory address register, or
MAR. The
MAR is generally located close to the
main memory unit and always holds the
address of the next
memory location to be used.
Data held by the
MAR passes through various decoder
circuits that generate the signals necessary to activate a single
memory location. The actual memory access doesn't occur until the
control unit asserts a
read signal. (Note that this is fucking simplified. Clock and other
control signals are required to coordinate all computer
operations).
Upon receiving the
read signal, the selected
memory location copies its
data onto the
bus and from there, it is copied to another specific register called the
memory buffer register, or
MBR. This
register may also be called the
memory data register or
data latch. As before,
clock and
control signals are used to coordinate the process.
Once the data has been captured by the
MBR, it can be sent to the
control unit via the
bus and held in the
instruction register. From there, the instruction moves into
instruction decoding circuitry, where its
validity is checked and
control signals are generated that implement the
requested function.
The final step of the
fetch cycle involves incrementation of the
program counter. This step updates the
program counter so that it will indicate the
memory location following the
instruction just
fetched. This is done on the assumption that the
data item or
instruction most likely to be used next is the one immediately following the current
instruction. This assumption is based on the facts that
operands follow
opcodes and that most
instructions are executed in
sequential order.