After the release of the ARM3 in 1991, Acorn spun off its processor design concern as Advanced RISC Machines Ltd, a company held by Acorn Computers Ltd, Apple Computer, and VLSI Technology in shares of 43%, 43%, and 14% respectively. ARM's first major design brief was from Apple, to modify their processor design to suit a planned Personal Digital Assistant.

New Naming Scheme

ARM's processor numbering scheme changed when it split from Acorn, and they still use the same scheme today. The first digit of a product number represents the generation of technology, such as ARM6, or the processor core for that generation. A two-digit product, such as the ARM61, is a straightforward core with the minimum interface circuitry required for it to be tested or used. A three-digit product, such as the ARM610, designates a processor cell combined with limited support circuitry, such as an MMU. A four-digit product, such as the ARM7500, is a system on a chip, with integrated graphics and IO support.

Technical Changes

By far the most important change in the version 6 ARM was the addition of 32-bit addressing support. This required a large redesign of the internal workings of the CPU: previously, the processor status and program counter shared the 32-bit R15 register, which was clearly not sustainable when the program counter needed to be thirty-two bits wide itself. The move to the new addressing system necessitated four 32-bit versions of the standard ARM processor modes, USR32, IRQ32, FIQ32, and SVC32. The ARM architecture retained full backwards compatibility to the ARM3 and earlier model processors using the legacy 26-bit modes: indeed, the ARM61 processor was produced as a hardwired 26-bit version of the ARM6 cell.

Further changes to the architecture included two new processor modes for handling memory fetch errors and undefined instructions, and a new pair of registers for storing the current and previous processor state in 32-bit mode, the Current Processor State Register (CPSR) and the Stored Processor State Register (SPSR). Combined, these two modifications allow the use of virtual memory without the jumping through hoops required with the previous processors: tracking page faults without a specific processor mode to do so was an exceptionally convoluted process.

Products using ARM6

The first product produced from the ARM6 cell was the ARM610, used in the 1993 Apple Newton Messagepad and the 1994 Acorn RiscPC. In addition to the processor cell, the ARM610 had an inbuilt MMU, a cache system similar to that of the ARM3, a performance-boosting write-back buffer, and still squeezed into 360,000 transistors. It was clocked at 20, 30, and 33MHz, and produced around 17, 26, and 28 average MIPS respectively. Most importantly for non-desktop computing usage, it was a very low on power consumption: this feature was improved upon still when the core was shrunk, and the processor logic extended slightly to support an incredibly low (for the time) 3.3v core voltage.

Fact Sheet

  • Used in: Apple Newton Messagepad, Acorn RiscPC (first generation), various embedded systems
  • Processors available: ARM60, ARM60L (low power cell), ARM61 (hardwired 26-bit cell), ARM610 (cell, MMU, 4KB cache, write-back buffer), ARM650 (cell, on-chip RAM, IO controller)
  • Fabrication: 1.0µm, 0.8µm
  • Clock: 0--33MHz
  • Cache: unified
  • Addressing: 26-bit, 32-bit
  • Architecture: ARMv3
  • Notable features: 32-bit addressing, virtual memory capable, first Advanced RISC Machine processor

Sources:

"The ARM RISC Chip", Atack/van Someren, Addison-Wesley, 1993
"ARM System Architecture", Furber, Addison-Wesley, 2000
"ARM Chips List", Banks

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