{computer term} When the processor receives an interrupt, it pauses normal execution and begins execution of an interrupt handler. In most cases, designers feel that it would not be a good idea for the interrupt handler to itself be interrupted.

For example, a typical interrupt is stack overflow. Handlers generally push register contents onto stack, which might well cause stack overflow and another interrupt. It might be best to let the handler execute. So, the first instruction in most interrupt handlers masks interrupts -- hides them, so the handler can complete execution unmolested, and (perhaps) return control to the main program.

Typically, interrupts are not queued -- so if a masked interrupt is no longer present by the time the masking handler completes, the masked interrupt is gone forever. So, most interrupt handlers are kept very short. Some processors support multiple levels of interrupt. In such cases, a medium-priority handler might mask low-priority interrupts, but not high-priority ones.

The non-maskable interrupt, usually called NMI, by definition cannot be masked. It will interrupt any process, including any handler.

A frequent cause of computer crashes is failure to correctly mask and handle interrupts.