A simple bistable multivibrator can be made by cross-coupling two NAND gates:

Note: The following has the assertion levels written out so as not to break my brain.

```                                      next stable
+------+                  now       state
S ---| NAND |                S R T B |    T B
|      |o+---- T        L L - - |    H H *bad*
+-|      | |              L H - - |    H L <-set
| +------+ |              H L - - |    L H <-reset
+------------+            H H H L |    H L <-rest
| |            H H L H |    L H <-rest
+----------+ |            H H L L |  \/none\/
| +------+   |            H H H H |  /\none/\
+-| NAND |   |
|      |o--+-- B
R ---|      |
+------+
```

Let's look at what happens to this device under each of the input (S,R) combinations. When SR=LH, the "set" state, the value of T is set to H. When SR=HL, the "reset" state, the value of T is reset to L. When SR=HH, the "rest" state, the value of T stays the same. Setting SR=LL is bad because, upon returning to the "rest" state, the device becomes astable and rapidly flips between the two states marked "none". Thus, there are only two useful states: T=L,B=H and T=H,B=L, and we can refer to the state of the entire device by merely referring to the state of T. We automatically know that B is the opposite.

Note that the device does not necessarily go directly to any of the states; it may travel through up to 3 intermediate states before finding the stable one. See also propagation delay.

Also note that both "set" and "reset" occur when the inputs S and R, respectively, are brought to the low level. They are thus low asserting, and in mixed logic notation, a much simpler state transition table describing the device's useful states of operation is:

```S(L) R(L) | T(H) B(L)
----------+----------
0    0   | rest rest
1    0   |  1    1
0    1   |  0    0
```

This device is sometimes called an unclocked SR Flip-Flop or an unclocked SR Latch. It is the basic component in both the (clocked) SR Latch and (clocked) SR Flip-Flop, and thus occurs in other types of Flip-Flops, in registers and in memories. See also synchronous sequential network, digital systems, feedback, switch debouncing.