Data Hazards occur in processors when an instruction cannot execute when originally planned. The instruction cannot exectue because the data it requires is not yet available.

This is a major problem in pipelined microprocessors, where a memory read can take many clock cycles, therefore if an instruction requires a value that was read out of memory, it will have to wait until the memory read finishes before proceeeding. These data hazards can occur very frequently so many methods are employed to get rid of data hazards, such as register bypassing, data forwarding, branch prediction, predication, and instruction prefetch.