An S-R latch (or S-R flip-flop) is a bistable multivibrator circuit made by cross-connecting two NAND gates.

```
______
S ---|     |
|     |O-+------>Q
+-|_____|  |
|          |
+------------+
| |
+----------+ |
| ______     |
+-|     |    |
|     |O---+----Q'
R ---|_____|

```

If S=0 and R=1, the latch resets, and Q=0. If S=1 and R=0, the latch sets, and Q=1. If S=0 and R=0, the latch holds the present value of Q. In there cases Q' (Qnot) is the opposite of Q. However, if S and R are both 1, Q and Q' output the same value, meaning that Q = Q'. This is called the forbidden case.

If some poor EE student puts an S-R latch into the forbidden state, then Q=Q', and all the basic assumptions of logic fail. All the laws of mathematics and physics break down, 0 equals Infinity, atomic nucleii repel their electrons, matter ceases to exist, and the universe disappears in a puff of logic.
As much as every "poor EE student" wishes we could destroy the universe with S-R Latches (especialy at 4 in the morning with Circuits homework), simple reality kicks in here. The heart of your S-R latch is made out of two MOSFET's (or other transistors, like BJTs or JFETs). That's EE geek speak for "really tiny transistor". Now, the circuit operates by sending one of the two outputs HIGH, and when one of the outputs is HIGH, it sends the other to LOW. In reality, one of these MOSFET's is "slower" than the other. It will be slower at reaching HIGH, and when the other one beats it to HIGH, it will be the one set low.

This I learned after trying to set both inputs to HIGH to try to generate a simple random bit generator. It failed, because the "faster" transistor will *always* be faster.

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