Similarly, in electrical engineering
, verification means checking whether your design follows the specification
. In other words, does the thing do what you wanted it to? In hardware design
, verification is seen to take up to 70% of the time spent on a project.
An anecdote: When the Virtual Socket Interface Alliance (VSIA) held a Verification Workshop in 1999, their conclusion was "Verification is hard." The final conclusion was changed a few weeks later to "Verification is not hard. It is very hard." The third VSIA verification meeting concluded "Verification is not just very hard, it is very, very hard."
(Source: Rashinkar et.al, "System-on-a-chip Verification", Kluwer Academic Publishers, 2001)