In computer science, the act of formally proving an algorithm's correctness (i.e. that all possible input yields results that conform to the specification). A very boring and tiresome task.

Similarly, in electrical engineering/hardware design, verification means checking whether your design follows the specification. In other words, does the thing do what you wanted it to? In hardware design, verification is seen to take up to 70% of the time spent on a project.

An anecdote: When the Virtual Socket Interface Alliance (VSIA) held a Verification Workshop in 1999, their conclusion was "Verification is hard." The final conclusion was changed a few weeks later to "Verification is not hard. It is very hard." The third VSIA verification meeting concluded "Verification is not just very hard, it is very, very hard."

(Source: Rashinkar et.al, "System-on-a-chip Verification", Kluwer Academic Publishers, 2001)

Ver`fi*ca"tion (?), n. [Cf. F. v'erification.]

1.

The act of verifying, or the state of being verified; confirmation; authentication.

2. Law (a)

Confirmation by evidence.

(b)

A formal phrase used in concluding a plea.

Verification of an equation Math., the operation of testing the equation of a problem, to see whether it expresses truly the conditions of the problem.

Davies & Peck. (Math. Dict.)

 

© Webster 1913.

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