VHDL: VHSIC Hardware Description Language
VHDL is the result of a US government project (the VHSIC project) started around 1980.
IEEE standard 1076.1 since 1987, update 1993.

Mainly VHDL is a hardware description language, used to describe to structure of digital ciruits.
VHDL has a very large descriptive power it supports different aspects of hardware description:
  • Structural description: creating a circuit by connecting different basic logic gates. Hierarchical design, making more complex components out of a combination of more basic ones, is supported, too.
  • Behavioral description: describing the logic behavior of a circuit or components by some small programs. These vary from traditional programs a little, because they are more simulation-orientated; they describe how a component reacts to certain events etc.
  • Generic description: This allows you to describe components with parameters and define their structure or behavoir as function of these parameters, e.g. a N-bit adder (instead of defining adders for every word length you use) or the delay of a component as a parameter.
It also supports the most important constructs of a decent programming language, like pointers, arrays, records etc. Together with the generic description this can be used to do really clever things like defining a generic N-bit adder with optimal delay/space tradeoff.
All these aspects can be mixed, but not every software might support all.

VHDL is really the state-of-art today.

IEEE standard 1076.

VHDL stands for "VHSIC Hardware Description Language". VHDL (and other hardware description languages) are used to describe digital circuits. The idea is to provide a way to describe circuits, so useful things (like processors) can be built up from transitors. With transistor counts for modern CPUs in the 50 million range (for a Pentium 4), this is a decidedly non-trivial ask.

VHDL is a serious HDL, the one that's generally used for serious processor design. The big-name implementation is by Synopsys (which also implements Verilog). Synopsys claims to be used by ARM, IBM, NVIDIA and Sun. It is also often used by Universities and research labs.

Descriptions of circuits in VHDL are typically hierarchial. The designer creates components, called entities. The entities are roughly equivalent to function prototypes in C. They describe the component, giving its name and input and output connections, called ports. So, you might start by creating an entity for a chip's datapath and then further specifying that in terms of registers, adders, etc.

To specify the behaviour of a entity, is described by an architecture. An architecture is a particular implementation of the desired behaviour. These can be behavioural descriptions, which indicate that a part should behave this way or they can be structural, which indicate how the entity is put together from smaller entities which are wired together. You can have multiple architectures for a single entity. This allows you to test different implementations of the same component.

Behavioural descriptions are given with a description language that looks a lot like a programming language. The designer can use this language to calculate what the output should be, based on the inputs. Timing can also be specified, so you would indicate that when the input changes, the output will change after a time delay, to represent the propagation delay of the circuit.

When a circuit is described, the next step is usually simulation. VHDL simulators take a circuit description and simulate what would happen if it was actually implemented. Usually, the circuit is connected (virtually) to a testbench which simulates input signals. In the simulator, the designer can check to make sure the output signals and timing meet expectations.

Once a circuit has been fully designed and debugged, it can be synthesized. Synthesis is the process of taking a VHDL model to a real chip. The target is typically an ASIC or FPGA, depending on use, requirements and volume. Not all VHDL architecture descriptions can be synthesized. The behavioural description language is too complicated to translate arbirtary expressions to silicon. Different implementations can handle different code and the designer must keep this in mind when doing the final designs.

VHDL is a common hardware description language, or HDL. It is used to describe all manners of digital systems in any complexity level, ranging from a gate-level description to a complex system

VHDL was developed by the Department of Defense. THis is evident in its name: VHSIC Hardware description language. VHSIC stands for Very High Speed Integrated Circuit. VHDL was developed from another DoD language, ADA, and sharse some features with ADA, most notably the fact that both have strongly typed variables and share syntax.

VHDL is NOT a programming language. It is a hardware description language. The main difference between the two is found in execution. VHDL is meant for devices, such as ASICs or FPGAs, whereas a programming language is meant for a microprocessor or microcontroller. The difference in execution is that VHDL executes in parallel, excepting for within sequential portions of the code such as processes, whereas programming languages execute sequentially.

There are two common uses for VHDL in industry: FPGAs, or the quite similar CPLDs, and ASICs. An FPGA is a field programmable gate array, which is essentially an array of digital logic devices which can be configured to implement a digital function. An ASIC is an aplication specific integrated circuit. It is a silicon chip fabricated by a semiconductor foundry to implement a function determined by the design of the ASIC. VHDL is used to describe the hardware used to implement functions in both technologies.

Benefits of using VHDL include portability, versatility, speed, and ease of development. VHDL is highly portable, owing to the fact that it is an IEEE standard. VHDL code may be ported from one manufacturer of FPGAs to another manufacturer of FPGAs or even to an ASIC. VHDL may also be able to describe functions at any arbitrary level of complexity, allowing for great versatility in what is described. VHDL, as a parallel execution HDL, allow the speed of the FPGA to be harnessed. Finally, owing to the ease of portability, widespread use, and aritrary level of complexity, it is simple to develop descriptions of functionality in VHDL.

A VHDL development environment is available free of charge from Xilinx, a company that designs FPGAs and CPLDs. This may be found here: http://www.xilinx.com/ise/logic_design_prod/webpack.htm

More information available on Wikipedia: http://en.wikipedia.org/wiki/VHDL

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