Socket 370 is a CPU socket originally created for the Intel
Celeron CPU. Having the cache integrated on-die obviated the need
for the relatively expensive Slot 1 packaging. Socket 370 Celerons
were originally released in early 1999 at 366 and 400 MHz, and could
be plugged into a Slot 1 motherboard with an inexpensive adapter
called a 'slotket'. Outside of the motherboard interface, they had
the same capabilities as the Slot 1 versions of the same
processor. This generation of Celerons was used in Abit's infamous
BP6 dual-processor motherboard.
When the Coppermine core Pentium III was introduced in late
1999, it too integrated the cache on die. Thus, it too transitioned to
the Socket 370 interface, but in a variant incompatible with previous
Socket 370 motherboards. To distinguish between the two variants, the
original Socket 370 chips were designated as PPGA (Plastic Pin Grid
Array) and the newer ones as FC-PGA (Flip-Chip Pin Grid Array), the
latter referring to the placement of the processor die on top of the
package rather than on the bottom as was previously customary. Newer
FC-PGA motherboards were, however, compatible with the older PPGA
The VIA Cyrix III series of CPUs also used the Socket 370 interface, and were fully compatible with FC-PGA and newer S370 motherboards. It remained on Socket 370 for a while after Intel had effectively abandoned it, but the Cyrix processor line eventually switched to the Pentium 4's Socket 478.
Unfortunately, with the introduction of the Tualatin Pentium
III and Tualatin Celeron in 2001, Intel created yet another
non-backwards-compatible form of Socket 370, FC-PGA2. This
difference required that a new chipset revision be used for the
Tualatin, such as the i815 B-Step. This seriously annoyed Pentium
III users who thought that the Tualatin would be a (relatively)
inexpensive performance boost while waiting for the Pentium 4 to
come down in price.
Compare these incompatibilities to the difference between the
Thunderbird and Palomino Athlons, which on motherboards
supporting a 133 MHz FSB required only a BIOS update.
This writeup is copyright 2002-2004 D.G. Roberge and is released under the Creative Commons Attribution-NoDerivs-NonCommercial licence. Details can be found at http://creativecommons.org/licenses/by-nd-nc/2.0/ .