Register bypassing is a technique in
pipelining computers used to avoid
stalling the pipe by resolving
data hazards. Related to a particular
ISA (
Instruction Set Architecture) and the design of the computer, register bypassing varies from machine to machine but the basic concept is fairly universal.
When you have a pipelined microprocessor, the stages of processing an instruction are broken up into different parts. How they are broken up varies from design to design, but usually moving final data values in registers is one of the last stages. Calculating an ADD or SUBTRACT may be a stage. So when two consecutive instructions try to access the same registers, the first one writing a value and the second reading that value, the data can be moved directly from the first instruction into the stage of the second instruction passing up the registers. This methodology effectively avoids writing that value into the register file and thus bypasses the registers.