The first of Hewlett-Packard's competitive RISC platforms, after major failures such as "FOCUS", which was described as "essentially a gigantic microcode ROM with a simple 32-bit data pipe bolted to it's side". PA-RISC was a clean-room implementation of the load/store style CPU, and traditionnally had no on-board cache (although in 1998 HP added a 1.5mb L1 with the release of the PA-RISC 8500). Was also the first CPU to come with built-in vector FPU instructions (MAX), the forerunner to Intel's MMX and SSE, and Apple's Altivec.

Log in or registerto write something here or to contact authors.