A type of MIPS instruction used for branch instructions and other immediate operations.

The first 6 bits (31-26, as usual) are the opcode.

The following ten are the two source (25-21) and (20-16) registers of the operation. The final 16 (15-0) are a field representing the immediate value added to the Program Counter. This value is sign extended to 32 bits.

I-type MIPS instructions are not just for branches. They're also for memory access and add, or, and, sub, etc.
 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
[ . . . . . | . . . . | . . . . | . . . . . . . . . . . . . . . ]
 opcode     | A       | B       | immediate

Branching

Depending on the opcode (beq or bne), the ALU compares the values of registers A and B for equality or inequality. If the test succeeds, it adds four times the sign-extended immediate value (the instruction length is four bytes) to the program counter.

ALU functions

The opcode specifies the function (xor, slt, etc.) that the ALU will perform (similar to the funct field in R-type instructions) on the value in register A and the immediate value. The result goes to register B.

Memory access

The memory address referenced in a lw (load word) or sw (store word) instruction is the value of register A plus the immediate value; the processor loads the value at that address into register B (lw) or vice-versa (sw).

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