GTL+, or Gunning Transceiver Logic, is the bus technology used by Intel P6 generation processors (the Pentium Pro, Pentium II, and Pentium III, and Celeron and Xeon processors based off of them), as well as the VIA Cyrix III processors. It is based on a shared bus system, unlike the EV6 bus used by the AMD Athlon and derivatives, which causes both engineering and performance difficulties in a multiprocessor system.
Technical details of the operation of the GTL+ bus are scarce, but it is known that it had significant noise problems at high frequencies. 66MHz, 100MHz, and 133MHz versions of the bus were used over its lifetime. The CPU connectors used with the GTL+ bus were Socket 8, Slot 1, Slot 2, and the various versions of Socket 370. Chipsets that worked with this bus include the LX, EX, BX, i810, i815, i820, and i840.
This bus was replaced by the Pentium 4's AGTL+ quad-pumped bus in 2001.
This writeup is copyright 2003-2004 D.G. Roberge and is released under the Creative Commons Attribution-NoDerivs-NonCommercial licence. Details can be found at http://creativecommons.org/licenses/by-nd-nc/2.0/ .