In programming terms, a register is the most efficient form of memory, In the 32-bit 80x86 architecture, there are 16 'main' x86 registers in use on Intel chips between the 386, and the NetBurst Pentiums, and the Centrino Pentiums. There are registers other then these, for instance x87 FPU registers, but if you're programming in assembly, these are the important ones.

There are 4 32-bit E?X general purpose registers where ? is one of these {A, B, C, D}, e.g. the EAX register. The EAX register is different from the other three gp registers in that it is derived from the 'accumulator' on the original 8086.

The general purpose registers can be referenced as 32-bit registers with their E?X referance, but the first 16-bits can be referanced using just ?x, and the first, and second bytes (sets of 8-bits) can be referanced with ?L(L=low the first byte), or ?H(H=high the second byte)... fyi, the '0' bit is usually the furthest bit to the right, to the right of the '1' bit.

Then, there's the source, and destination index register: ESI, and EDI, much the same as the general purpose registers in most aspects. Where they differ from the gp registers, is in purpose. They are the registers where the source, and destinations addresses are kept.

Then, there are the Pointer registers, ESP (extended stack pointer), and EBP, (extended base) pointers.

ESP points to the address of the stack, and is changed when stacks are pushed, or popped. (my explanation of the pointer registers is particularly weak... sorry)

EBP isn't changed all that often, I think it normally points to the beginning of where stacks are stored, though it can also be changed to point to addresses of intermediate stacks.

Then, there are the six 16-bit segment registers, ?S where ? is an element of {C, D, E, F, G, S}. The CS register is the code segment, which, when you're using a segmented memory model contains the segment number of the code, and DS, which does the same for the segment number of the data. ES, FS, and GS are general purpose segment registers, and SS is the stack segment register.

The EIP register is the instruction pointer, it's, I believe even lower level then assembley language, and it points to the address of the operation that's upcoming.

The EFlags register indicates properties of the processor, and carries some status flags. status flags are things like the {C, O, Z} ?F flags, the overflow flag, which is high when the last math operation lead to overflow, the carry flag, when the last math operation lead to a carry situation, and the zero flag, when the last operation resulted in a zero. other status flags, are the parity flag, the sign flag, and the direction flag. CF is bit 0, PF is bit 2. ZF is bit 6, the SF is bit 7, the DF is bit 10, and the OF is bit 11.

In AMD's 64 it extension of the 80x86 architecture, 64 bit registers are added. I'm sorry that's all I know about that.

The source I used for most of this information, is Richard Detmer's 'Introduction to 80x86 Assembley Language, and Computer Architecture' published by Jones and Bartlett Publishers.

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