| Doubtful this floating point arithmetic mistake has ever been made, even by Intel.
FPUs represent real numbers as a binary number (the mantissa) times a power of 2 (the exponent). 1 would be represented as a mantissa of 1 and an exponent of 0. (Internally, it's a mantissa of 0 and an exponent of 127 for IEEE 754 single precision, but that's beside the point.)
This means that no accuracy is lost in the translations of the two numbers to binary form. The process of adding is then easy. Since the exponents are the same, the exponent of the result is one more than that of the addends, and the mantissa of the result is just the sum of the addends bit-shifted right by 1. The addends and the answers are infinitely precise.
An FPU with zero bits of precision would still get 1+1 right.
Well, addition is easy. Division is hard. | 
